✨ AI Summary
We are seeking a Principal Engineer for ASIC Verification to lead and execute verification strategies for world-class SoCs based on latest technology ASICs and FPGAs. The role requires independent contribution in development and verification, building SystemVerilog/UVM-based communication protocol components, and developing test plans from functional requirements and standards. The candidate should have 10+ years of ASIC verification experience, strong SystemVerilog/UVM, scripting (Python/Perl), knowledge of assertions, functional and code coverage, and familiarity with formal verification tools and emulation platforms. Collaboration with system engineers, HW/SW teams, and suppliers is essential, along with supporting bring-up and debugging activities.
Requirements
Qualifications include a Bachelor's degree in Computer Science or Electrical Engineering (Master's degree preferred) and 10+ years of experience in ASIC verification. Candidate should have hands-on experience with SystemVerilog, UVM, Python/Perl, test planning at chip level, knowledge of assertions and functional/code coverage, and familiarity with verification tools, emulation platforms, and related protocols. Strong communication and ability to work in a geographically diverse team are required; bonus if experienced with embedded processors and external memory interfaces.
Description
We are seeking an ASIC Verification Engineer with a solid ASIC/FPGA verification test strategy & development and debugging skills.
NION2026